design phase produces a physical model which includes the hardware configurations of a production system, whereas the electrical design phase describes the ‘control program’ of the system as a logical model (discrete event model)。 Usually, electrical design involves PLCs, which are currently a basic and universal tool for the automation of manufacturing pro- cesses。 Traditionally, the development of PLC-controlled appli- cations, mechanical design, and electrical design have been performed sequentially [8], and partly online。 So, before a control engineer can proceed with programming, verification, and optimization of the control code, the mechanical work must first be completed。 This manufacturing process is inefficient and it increases the time required for a product to reach the market。 So, many manufacturing companies have adopted more attractive methods for totally offline PLC simulation, in which both the mechanical and the control engineers work simultaneously。
As shown in Fig。 1, to construct a PLC simulation envi- ronment, it is necessary to build a corresponding virtual plant model (the counterpart system) required to interact with the input and output of the PLC。 The behavior of the plant model should be the same as that of the actual production line to achieve PLC verification。 Since a production line consists of various devices, we can consider a plant model as a set of virtual device models。
Previous approaches to PLC simulation can be categorized into three groups: (1) framework for the PLC simulation, (2) verification of a given PLC program, and (3) automatic gen- eration of a PLC program。 In the first group, several have proposed a PLC simulation framework for the verification of the control logic with commercial software。 Some of the researchers have proposed the architecture of a PLC program environment [9–12]。 This environment enables visual verifi- cation of the PLC program integrated into a PLC with corre- sponding virtual plant models。 This approach mainly focuses on the development of the theoretical background, which indicates how to construct the PLC simulation environment。 In the second group, various software tools have been devel- oped for the verification of PLC-based systems by using timed automata, such as UPPAAL2k, KRONOS, Supermia, and HyTech。 Moreover, this type of approach is mainly for pro- grams that are written in a state list language, which are also referred to as “Boolean。” As they mainly focus on checking the theoretical attributes (safety, liveness, and reachability), it is not easy for users to determine whether or not the PLC programs actually achieve the intended control objectives [13–15]。 In the third group, many researchers have focused on the automatic generation of PLC programs from various formalisms, and this includes state diagrams, Petri nets, and IDEF0 [16–20]。 These formalisms can help the design process of the control logic, but it is still difficult to determine the hidden errors, which is the most difficult part of verifying a control program。 Considerable work has been undertaken in the field of PLC simulation and validation for a long period of time, but limitations remain in efficiently constructing adjust- ed simulation models。
In order to overcome the aforementioned problems, it is necessary to utilize simulation techniques for PLC simulation。 Although PLC simulation can be a very powerful method for the detailed verification of a production system, the accompa- nying construction of a virtual plant model, which is a set of virtual device models, is a major obstacle。 As PLC programs contain only the control information, without device models, it is necessary to build a corresponding virtual plant model to perform simulation, as shown in Fig。 1。 However, constructing a virtual plant model requires an excessive amount of time and effort。 Sometimes, the virtual plant model construction requires more time compared to the PLC programming。 This serves as the motivation for exploring the possibility of finding an efficient method for the generation of a virtual plant model in the reverse engineering approach。 PLC仿真的虚拟工厂英文文献和中文翻译(2):http://www.youerw.com/fanyi/lunwen_101493.html