achieved without  their use,  but  to differing amounts;
they  will,  hopefully,  reduce  test  pattern  generation
costs, but to differing amounts; one DFT method might
not  require  fault  simulation,  but  the  other may  need
it to verify fault coverage; the number of pins required on the device package will increase due to test control
signals, extra docks etc., but to differing amounts (this
may mean  increasing  to  the next package  size  for ex-
ample); there will be an impact on ATE requirements,
but  to  differing amounts.
The average designer can,  therefore, be faced with
a  very wide  range  of sometimes  conflicting require-
ments  that need to be juggled when  trying  to  achieve
not  just  a  testable  design,  but  one  that  (given  the
statements made  earlier)  is  as  cost  optimal  as  possi-
ble: how to relate  the effects  of  increased pin count with
reduced  test pattern  generation  costs,  increased  area
overhead vs.  reduced test time. A wide  range of very
disparate  values  need  to  be  compared.  One  way  to
achieve this  in a coherent way is  to cost the impact of
each parameter on  the overall design.  In  this context,
"cost" means  s  $,  u  etc.
Such  a  method  would  remove  any  doubts  as  to
relative  importance  and,  potentially,  pacify  all
doubters/dissenters in design, manufacturing, test, and
management provided that it is done in a rigorous way.
Cost data that refer  to test-related issues are difficult
to fmd.  Even a widely known concept as  the  "rule of
tens"  is now under  attack as  not representing what  is
happening  in  the  1990s  [4].  Other  graphs,  Figure  1,
show  a  scenario  around DFT  cost  impact  upon  total
costs, but neglect to show bow to achieve an optimum
level of testability  that will minimize  overall costs.
Even if  the process needed to achieve minimum cost
were known,  there would  still be problems  surround-
ing management culture in any given company. Imple-
menting  DFT may well  increase  the Design Depart-
ment's  costs  in order to make even greater  savings  in
the Test Depaatment. This article discusses a set of software  tools that have
been  developed  at  Brunel  University  with  Siemens-
Nixdorf Informationssysteme that  address  this  issue.
These tools are integrated around a  suite of economic
models  that  attach  or  calculate  real  costs  for  a  wide
range of parameters  that  cover all  aspects  of design,
manufacture, and test so that any test-related decisions
are  placed  in  their  correct  contexts.  The  economic
models  then interface to a  set of knowledge bases and
algorithmic procedures to advise a  designer as  to  the
optimal mix of DFT strategies. The optimization proc-
ess attempts to reduce the overall cost to the company
and  ensures  that  any  specified engineering criteria  is
still  met,  for  example,  a  minimum  fault  coverage, ECO测试系统英文文献和中文翻译(2):http://www.youerw.com/fanyi/lunwen_8050.html