宽带中频信号采集与产生电路设计与实现

摘要本文针对多通道宽带中频采样和信号产生电路的研制，开展了模数转换电路（ADC）、高速时钟产生电路和数模转换电路的设计，采用定性和定量的手段详细分析影响高速ADC设计性能和高速差分时钟产生电路性能的因素。主要工作包括：64570

1, 根据设计指标要求，完成了高速ADC、DAC和差分时钟产生电路的选型，完成电路的原理图设计；

2. 针对高中频采样的实际要求，选用变压器级联进行模拟中频采样的前端设计，定性分析了变压器级联对单端信号转换为差分信号的幅像不平衡度的影响，并定量分析输入差分模拟信号的幅像不平衡对ADC采样结果的影响；

3. 针对所选择高速差分时钟产生电路，使用ADIsimCLK软件辅助设计环路滤波器，获得符合ADC和DAC要求的低抖动差分时钟输出，并定量的分析了时钟抖动对ADC采样结果的影响；

4. 完成了高速ADC、DAC和差分时钟产生电路寄存器配置程序的设计、ADC接口程序设计、DDS和DAC基带信号产生程序设计，并初步验证了程序的正确性。

毕业论文关键词宽带中频模拟前端时钟电路信号采集信号产生

毕业设计说明书（论文）外文摘要

Title Design of wideband IF signal acquisition and generation circuits

Abstract In the Design of wideband IF signal acquisition and generation circuits, AD converters circuits and high speed clock circuits are first designed followed by Qualitative and quantitative analysis of the influence on AD sampling and high speed clock generation. Main work is as follows:

1, The proper models of ADC, DAC and clock generation chip were selected. The schematic diagram of them was finished.

2, Configurations of cascaded transformers to be coupled front-end for wideband ADC was designed. Qualitative analysis of the influence on the amplitude and phase imbalance of differential clock signal by the transformers cascaded was done. So was quantitative analysis of the influence on the sampling of ADC by the amplitude and phase imbalance of the differential input analog signal.

3, With the assistance of the software ADIsimCLK provided by ADI in designing the circuit, high speed clock with low jitter are produced. Quantitative analysis of the influence on the sampling of ADC by the jitter of the high speed clock signal was done.

4, Programming of ADC,DAC and clock generation chip was finished. And the test of the programs to verify whether it can sample and synthesize as expected is accomplished.

Keywords wideband high-IF Front-End clock circuits signal acquisition signal generation

1 绪论 1

2 数字中频接收与产生相关理论 2

2.1 中频带通采样和数字下变频原理. 2

2.2 直接数字频率合成（DDS）原理..... 4

2.3 数字上变频（DUC）原理. 5

3 宽带中频采样与产生电路设计 5

3.1 宽带中频采样电路设计 5

3.2 宽带信号产生电路设计 9

3.3 差分时钟产生电路设计 13

4 宽带中频采样与产生电路设计 23

4.1 高速ADC模拟前端设计与性能分析. 23

4.2高速ADC采样时钟电路设计与性能分析 29

4.3 高速ADC寄存器配置 .. . 33

结论 35

致谢 36

参考文献37

1. 绪论

1.1 宽带中频信号采集与产生电路的应用背景

根据香农的信息理论，宽带雷达最基本的优势在于增加了回波中关于目标的信息量，这些信息包括目标存在与否、位置以及目标和周围环境的散射中心分布特征等。从应用的角度来说，宽带雷达较之窄带雷达具有以下几个方面的优势：论文网宽带中频信号采集与产生电路设计与实现:http://www.youerw.com/tongxin/lunwen_71834.html