雷达目标模拟器的实控机FPGA的软件设计与实现

摘要现代电子技术的飞速发展，使得雷达的结构组成和设计发生了根本性的变化。越来越复杂的雷达系统使得对其的调试变得更加困难。采用外场实验提供雷达的测试数据会耗费大量的人力物力且测试环境可控性差，由此能提供高度仿真测试环境，使用模拟手段来调试的雷达目标回波模拟器应运而生并迅速发展起来。64767

实时控制计算机在目标模拟器启动之后，接收来自PC机的工作参数，产生波驻脉冲、PRF脉冲，并向雷达目标模拟器送出控制命令，另外它还可以接收目标模拟器的报告信息。

论文首先对实时控制计算机的主要功能以及它与外部设备之间的通信情况作了具体的说明，给出了系统设计方案。然后重点讨论了实时控制计算机的软件设计。论文利用了Xilinx公司的ISE开发设计软件，运用Verilog HDL硬件描述语言来完成对实控机系统的编程。结合第三方软件Modelsim进行仿真，验证结果是否正确。最后将已经仿真实现的程序下载到已有的FPGA开发板上，运用Chipscope进行调试，同时将生成的配置文件导入芯片进行测试，并通过示波器观察输出波形。最终的调试结果表明实时控制计算机的软件设计达到了预期的要求。

毕业论文关键词雷达目标模拟器实时控制计算机软件设计 Verilog HDL 语言

毕业设计说明书（论文）外文摘要

Title FPGA software design and implementation of real-

-time control computer of radar target simulator

Abstract

With the rapid development of modern electronic technology, the composition and design of the radar has undergone fundamental changes. The radar system has become more and more complex, which makes it more difficult to debug. Using field experiments to provide radar test data will bring a huge waste of human and material resources, and the controllability of the test environment is poor. Therefore, the radar target echo simulator, which can provide highly realistic test environment and use simulator tools to debug, emerged and developed rapidly.

After the simulator starts to work, the real-time control computer receives operating parameters from the PC, and then sends commands to the radar target simulator. In addition, it can receive feedback information of the simulator.

Firstly, the paper gives a specific introduction of the main functions of the real-time control computer and its communication with the external devices，as well as the system design. Then the paper focuses on talking about the software design of the real-time control computer. In this thesis, the Xilinx’s ISE design software and Verilog HDL hardware description language are used to complete the implement the real-time control computer. The next step is Combining with the third-party simulation software, Modelsim, to verify the results. Finally, the program has been downloaded to the existing FPGA board and is debugged by using Chipscope. At the same time, the generated configuration file is imported to the chip to be tested and the output waveform can be observed through the oscilloscope. The final results show that the software design of the real-time control computer has met the expected requirements.

Keywords radar target echo simulator real-time control computer software design Verilog HDL

1 绪论雷达目标模拟器的实控机FPGA的软件设计与实现:http://www.youerw.com/tongxin/lunwen_72083.html