摘要文章提出了一种采用CORDIC算法实现QDDS信号发生器的设计方法; 传统的直接数字频率合成DDS设计主要采用查表法(LUT)结构设计，本文提出采用CORDIC算法代替正交波形存储表, 其结构主要采用迭代、移位、加减等运算, 实现正交正、余弦数字信号的存储。设计采用VHDL 语言描述硬件电路和FPGA开发平台实现,用Quartus II 软件进行编译调试和仿真。系统时钟频率为48Mhz，电路可以产生正交两路正弦波。在此基础之上，本实验还顺利完成了测频、频率控制、相位控制，AM调制等问题。64908
毕业论文关键词 CORDIC算法 正交输出直接数字频率合成器(QDDS) 正弦波
毕业设计说明书（论文）外文摘要
Title QDDS signal generator design based on CORDIC algorithm
Abstract In this paper,a design method of quadrature direct digital synthesizer( QDDS) based on Coordinate Rotation Digital Computer( CORDIC) algorithm is proposed.The traditional design of DDS direct digital frequency synthesis method mainly uses the look-up table (LUT) structure design，In this paper, instead of using the CORDIC algorithm orthogonal waveform memory table whose structure is mainly iterative, shift, addition and subtraction operations, to achieve quadrature sine and cosine digital signal storage. Design using VHDL hardware description language and FPGA development platform, compiled with the Quartus II software debugging and emulation. System clock frequency is 48Mhz, the circuit can generate two orthogonal sine wave. On this basis, the present study also successfully completed the frequency measurement, frequency control, phase control, AM modulation and other issues.
Keywords CORDIC algorithm Quadrature output direct digital frequency synthesizer (QDDS) Sine
目 次
1 引言（或绪论） 1
1.1 CORDIC算法 1
1.2 CORDIC算法的基本原理 2
1.3.1 国外的研究现状 5
1.3.2 国内的研究现状 5
1.4 CORDIC算法前景展望 5
2 EDA技术 7
2.1 可编程逻辑器件FPGA概述 7
2.2 VHDL语言介绍 7
2.2.1 VHDL语言特点 7
2.2.2 VHDL语言的结构 8
2.3 QuartusⅡ软件概述 8
2.3.1 QuartusⅡ 简介 8
2.3.2 QuartusⅡ开发系统的特点 9
3 QDDS信号发生器的设计 10
3.1 DDS信号发生器 10
3.2 QDDS系统结构原理 10
3.3 各子模块设计 11
3.3.1 分频器模块 11
3.3.2 频率控制字模块 13
3.3.3 相位累加模块 FPGA基于CORDIC算法的QDDS信号发生器设计:http://www.youerw.com/tongxin/lunwen_72316.html