摘要简单描述了超宽带技术的发展历史，基本概念和主要技术特点，以及超宽带技术相比于其他通信技术的优缺点。介绍和比较了几种典型的超宽带窄脉冲产生方法，最后提出了一种基于数字电路方式实现纳秒级窄脉冲的方法。并介绍了电路的基本原理以及核心原器件的主要性能，设计了窄脉冲发生器电路，对实际制作的电路进行了测试。最后根据测试结果对其进行了分析和拓展，得出了相关的结论。63914

本方案包括LVPECL超宽带脉冲产生电路和FPGA控制电路两个部分。首先通过一个晶振产生100MHz的时钟，再由FPGA芯片EP1C3T100A8进行十分频变为10MHz作为该电路的标准时钟，经过时钟分配器变为两路信号，用芯片MC100EP195将其中一路信号进行延时与反向，然后通过高速比较器和一个高速与门生成一个脉冲宽度约为1ns的窄脉冲，最后通过实验证明该电路基本满足生成超宽带脉冲的要求。

毕业论文关键词  超宽带  数字电路  脉冲  FPGA

毕业设计说明书（论文）外文摘要

Title   Design of a UWB pulse generator                    

Abstract The development of the UWB , its basic concepts and its main technology characteristics are introduced in this thesis. And the comparison of several typical UWB pulse generators are described. Then, a new method of nanosecond UWB pulse generatior which is based on digital circuit is introduced．The basic theory and the performance of the key device are introduced，and the circuit of UWB pulse generator is also described．At the end of the article, the experiment on the circuit and the pulse it generates is performed. The experiment results and the conclusion based on the results are also presented.

The program includes two parts: LVPECL UWB pulse generating circuit and FPGA control circuit. Firstly， a 100MHz crystal oscillator is used to generate a clock, and then it is pided by the FPGA chip EP1C3T100A8 becoming 10MHz frequency clock as the standard clock. After then ,the clock would be pided into two signals, one of which would be delayed and reversed by the chip MC100EP195, and then through a high-speed comparator and a high-speed ND gate to generate a pulse, width of which would be about 1ns, finally, the design would be proved by experiments that the circuit generates basically meet the requirements of ultra-wideband pulses.

Keywords  UWB   digital circuits  pulse  FPGA

 1.绪论 1

1.1 UWB技术发展简史 1

1.2 UWB定义及相关概念 2

1.3 UWB技术的优势 3

1.4 UWB的发展现状及方向 5

1.5 本课题实现超宽带脉冲器的方法 7

1.6 本论文的组织安排 8

2 超宽带脉冲发生器的设计 9

2.1基于模拟方式的窄脉冲设计 9

2.1.1 设计概述 9

2.1.2 射频晶体管 9

2.1.3阶跃二极管 11

2.2 基于数字方式的窄脉冲设计 13

2.2.1设计概述 13

2.2.2基于FPGA+LVPECL的窄脉冲产生基本原理 13

2.2.3基于FPGA+LVPECL的窄脉冲产生的硬件电路设计 14

2.2.4 电路的拓展 19