摘 要传统的平面规划，通常处理的只有块包装，以尽量减少芯片面积，而现代超 大规模集成电路（VLSI）的布局规划通常需要在固定的边界内摆放各个模块， 另外还要考虑各个模块的摆放位置和互相关联的连约束条件。布局规划是一个最 具挑战性的现代平面规划问题，因为它需要同时考虑互连和模块位置的约束。69632

在本文中，我们研究了现代平面布置图的问题：固定的边界的布局规划，我 重点介绍了模拟退火算法（SA）的 B*-tree 平面布置图的平面规划。对于模拟退 火算法，我首先将其类比于物理退火引出了对模拟退火算法的简介，接着介绍了 在布图规划中涉及到的有关模拟退火算法的问题，着重了解了模拟退火算法的计 算过程和使用到的相关变量。对于 B*-tree，主要介绍了其表示方法和基于 B*-tree 的平面布图算法。对于固定的外形布局规划，提出了改进的模拟退火（MSA） 算法，并比较了相对于原始的模拟退火算法的优点。

该论文有图 11 幅，表 4 个，参考文献 30 篇。

毕业论文关键词：布局规划 物理设计 模拟退火算法 B*tree

Fixed-outline floorplanning in very large scale integration

Abstract

Traditional floorplanning handles packaging in order to minimize the chip area. However, the floorplanning of the modern very large scale integrated circuit (VLSI) usually needs to put each module in the fixed boundary, also taking into account each module of the placement and linked to each other even constraints. The fixed-outline floorplanning is one of the most challenging problems in modern floorplanning, because it requires the simultaneous consideration of the constraints of the interconnection and module positions.

In this paper, I study the problem of modern plan layout: the fixed boundary layout planning, I focus on the simulated annealing algorithm (SA) of the B*-tree plan for the planar layout. For the simulated annealing algorithm, we will first with the analogy to physical annealing leads to the introduction of the simulated annealing algorithm, and then introduces the problems involved in the layout planning of simulated annealing algorithm, focus on understanding the calculation process of simulated annealing algorithm and use of the related variables. For B*-tree, this paper mainly introduces the representation method and the plane layout algorithm based on B*-tree. An improved simulated annealing (MSA) algorithm is proposed for the fixed shape layout, and compared with the advantages of the original simulated annealing algorithm.

Key Words：Floor planning Physical design Simulated annealing B*tree

目 录

摘要 I

Abstract II

目录 III

图清单 IV

表清单 IV

1 绪论 1

1.1 课题研究背景及意义 1

1.2 国内外研究现状 2

1.3 本论文的主要工作 3

2 布图规划 4

2.1 VLSI 布图规划问题的描述 4

2.2 VLSI 设计流程 4

2.3 布图设计 6

2.4 布图规划的成本函数的构造