摘要由于芯片技术的限制我国很难在高端的数据采集系统中有所作为，一般国内的数据采集卡都处于中低端产品，多用于中低频信号的采集中，很少有符合我们设计要求的高速采集系统。本设计采用AD转换器+FPGA芯片+ARM处理器的结构，实现了采样率为100M的数据采集卡。
论文从宏观和微观两个方面来分析数据采集卡的各个组成部分。从宏观上分析了采集系统中各个芯片间的数据流向、速度匹配和具体通信方式的选择等问题设计从宏观上优化数据传输的效率,充分发挥器件的性能,并提出了一些改进系统性能的方案。从微观实现上,数据是从前端数据调理电路进入AD转换器，再由FPGA采集AD转换器输出的数据，再传输给后端的ARM处理器，最后由ARM处理器送给LCD显示。微观实现的过程中遇到了很多问题，主要是在AD数据的采集和采集数据的传输上。在后期的系统调试中遇到了采集数据错位、ARM与FPGA通信效率低下，还有FPGA中预处理时序紧张等问题,通过硬件软件部分的修改，问题都得到一定程度的解决。10345
在整个数据采集卡的设计过程中还遇到高速PCB设计、硬件设计可靠性、设计冗余性和可扩展性等问题,这些都是硬件设计中的需要考虑和重视的问题,在论文的最后一章有详细论述。
关键词：数据采集；FPGA；高速AD；高速PCB
The SCM Controlled System Design of High-speed Digital Acquisition Based on FPGA
Abstract：It is hard for us to make a brilliant success in the area of high-end data acquisition due to the restraint of the technology of chip. At present the data acquisition card in our country are almost low-end products which are always used to deal with median frequencies low frequencies. And the systems of acquisition seldom are line with the demanding of our design. In this paper, high-speed data acquisition card is a part of high performance analytical instruments. The differences between this kind of cards and the others are that they are not rigid to the output of system and have the ability of data analyzing and processing. We successfully design a system of 100M sampling frequencies based on the structure of A/D，FPEG and ARM.
This paper analyzes the system from Macro-and micro respect. From the macro point of view it analyzes data flowing，speed matching and the selection of specific means of communication of acquisition system and so on. From the micro point of view，data enter into the A/D converter from the front-end conditioning circuitry, FPGA collecting data on the output of A/D converter . After these operations，data are transmitted to the back-end of the ARM processor and then display on the LCD. A lot of difficult exited in the successful operation in the micro respect which is mainly about A/D data collection and the of transmission data. In the latter part of the system we encounter the dislocation data collection, the inefficiency of ARM and FPGA communication and the tension of timing in the pre-operation of FPGA. All of these issues have been settled by the revising of hardware and software.
The are also some problems encountered in the design process of data acquisition card, such as the design of PCB, the reliability of hardware design reliability Redundancy and scalablility of the system, all the solution of these problems are illustrated in the last part of the this paper.
KeyWords：Data Acquisition FPGA High-speed A/D converter High-speed PCB
目 录
第一章 绪论 1
1.1 论文研究背景和意义 1
1.2 国内外研究现状与水平 1
1.3 数据采集卡主要的性能指标 3
1.4 本文主要研究工作和难点 3
第二章 系统设计方案和主要器件选型 3
2.1 系统设计方案 3 单片机控制FPGA的高速数字采集系统的设计:http://www.youerw.com/zidonghua/lunwen_9374.html