VHDL的FPGA和DDS频率信号发生器的设计

摘要直接数字频率合成器（DDS）技术作为一种新兴的直接数字频率合成技术，具有频率分辨率高、切换速度快、切换相位连续、输出信号相位噪声低、可编程、全数字化易于集成、体积小、重量轻等优点，广泛应用于雷达、通信、航空航天、仪器仪表和电子对抗等领域。60126

本文通过了解DDS的工作原理、结构、理想输出频谱和相关技术指标，对DDS有了更深入的认识，结合硬件电路所学的相关知识，将现场可编程逻辑器件FPGA和DDS技术相结合，写出DDS驱动时序的VHDL程序，获得频率合成的波形，体现了基于VHDL语言的灵活设计和修改方式是对传统频率合成实现方法的一次重大改进。FPGA器件作为系统的控制核心，其灵活的可更改性，再配置能力，便于系统改进，进一步提高系统性能。运用Quartus II软件进行驱动时序的仿真，通过已有电路板调试通过并获得输出信号波形图，达到其预期性能指标。

毕业论文关键词 FPGA DDS VHDL Quartus II

毕业设计说明书（论文）外文摘要

Title FPGA and DDS frequency signal generator design

Abstract

Direct Digital Synthesis (DDS) technology as a new direct digital frequency synthesizer technology, with high frequency resolution, fast switching speed, switch the phase - continuous, the output signal low phase noise, programmable, digital ease of integration, small size and light weight, it is widely used in the field of radar, communications, aerospace, instrumentation and electronic countermeasures.

To understand the working principle of the DDS structure, the ideal output spectrum and related technical indicators, a deeper understanding of the DDS, combined with the knowledge learned by hardware circuit, field programmable logic device FPGA and DDS technology, writing the DDS drive timing VHDL program, the waveform frequency synthesizer, reflecting the flexible design of the VHDL language and modify the traditional frequency synthesis method a significant improvement. FPGA device as the control core of the system, its flexible and can be changed, re-configuration capability, ease of system improvements to further enhance the system performance. Quartus II software to drive timing simulation, debugging through existing circuit board and get the output signal waveform diagram reaches its expected performance indicators.

Keywords FPGA DDS VHDL Quartus II

第一章绪论 1

1.1 课题背景 1

1.2 频率合成技术的特点和发展 1

1.3 频率合成器的性能指标 2

1.4 本文的研究内容及工作安排 3

第二章直接数字频率合成（DDS）技术 4

2.1 DDS的基本工作原理 4

2.2. DDS的主要特点 6

2.3 DDS的理想输出频谱分析 8

第三章系统的硬件电路设计 10

3.1 系统硬件总体设计要求及方案 10

3.2 FPGA介绍及相关电路设计 11

3.2.1 FPGA的工作原理 11

3.2.2 FPGA的特点 11

3.2.3 FPGA开发板 12

3.3频率合成模块设计 14

3.3.1 AD9859的概述 VHDL的FPGA和DDS频率信号发生器的设计:http://www.youerw.com/zidonghua/lunwen_65499.html