[53] Zhang L, Sun L, Guo Y H, et al。 Reliability of lead-free solder joints in CSP device under thermal cycling[J]。 Journal of Materials Science: Materials in Electronics 2014, 25(3): 1209-1213。

[54] Wang T H, Lai Y S, Wu J D。 Materal properties of thermal cycling fatigue reliability of flip-chip ball grid array[J]。 Journal of Electronic Packaging, 2004, 126(4): 560-564。

[55] Morgan B, Hua X F, Iguchi T, et al。 Substrate interconnect technologies for 3D MEMS packaging[J]。 Microelectronic Engineering, 2005, 81(1): 106-116。

[56] Chang B J, Wang L, Drink J, et al。 Finite element modeling predicts the effects of voids on thermal shock reliability and thermal resistance of power device[J]。 Welding Journal, 2006, 85(5): 63-70。

[57] Park S B, Dhakal R, Lehman L, et al。 Measurement of deformations in SnAgCu solder interconnects under in situ thermal loading[J]。 Acta Materialia, 2007, 55: 3253-3260。

[58] Fan X J, Varia B, Han Q。 Design and optimization of therm-mechanical reliability in water level packaging[J]。 Microelectronics Reliability, 2010, 50(4): 536-546。

[59] Chen K M。 Lead-free solder materials and chip thickness iMPact on board-level reliability for low-K WLCSP[J]。 IEEE Transactions on Advanced Packaging, 2010, 33(2): 340-347。

[60] Ha S S, Kim J W, Ha S O, et al。 Shear parameters for brittle fracture of flip chip  solder joint[J]。 Materials Science and Technology, 2011, 27(3): 696-701。